![]() ![]() The circuit cofactors contain a large number of solutions and hence capture a larger solution space. The proposed scheme contains the size of the state set and helps to iteratively compute the preimage for many cycles until a fixed point / desired state is reached.įurther, we gear the ATPG engine to directly compute the circuit cofactors, rather than individual solutions. We propose a node-based conversion scheme that derives the functionality of each node in the decision diagram. In order to use the preimage state set as the objective in the subsequent iterations, we propose efficient techniques to convert a decision diagram into clauses/circuit. The solution set that is obtained, with the initial state set as the objective, represents the one-cycle preimage. We propose efficient decision selection heuristics and derive a suitable cut-set metric to quickly obtain a compact solution set. First, we develop an ATPG engine, with search-space aware learning, that computes ``all solutions" for a given target objective and stores it as a decision diagram. In order to perform unbounded model checking, we need the core image / preimage computation engines that perform forward / backward reachability analysis. In this dissertation, we exploit Automatic Test Pattern Generation (ATPG) for Unbounded Model Checking (UMC). We propose efficient representations and intelligent learning techniques that reason on the problem structure and take advantage of the repeated search space, thereby alleviating the memory required and time taken to solve these problems. In this dissertation, we target two related problems in Design Verification and Testing: Unbounded Model Checking and Path Delay Fault Testing, that commonly suffer from extremely large memory requirements. The increasing complexity of VLSI designs, in recent years, poses serious challenges while ensuring the correctness of large designs for functionality and timing. ![]()
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